Samsung and SK hynix are pioneering CXL memory to overcome AI capacity bottlenecks. This new standard decouples memory from processors, allowing for massive, flexible memory pools without costly compute upgrades, complementing HBM for speed.
New Memory Class for AI Growth
Samsung Electronics and SK hynix pushed to commercialize a new class of memory as artificial intelligence outgrew high-bandwidth memory alone, according to a news report by The Korea Herald. Both tech giants developed products built on the latest generation of Compute Express Link, known as CXL. The standard connects processors and memory over a common PCIe interface, slotting between conventional DRAM and solid-state storage to offer significantly higher capacity during live computation.
The shift reflected a broader transition in AI memory from raw speed toward system architecture, driven by capacity constraints. As per the news report, in existing AI servers, HBM sat beside graphics processors while standard DRAM paired with central processors. Neither expanded independently, forcing operators to purchase expensive processors simply to add memory. CXL decoupled that dependency, permitting access to large memory pools without additional compute purchases.
SK Hynix’s CXL Advancements
SK hynix demonstrated its progress at the HPE Discover conference in Las Vegas in June, displaying a second-generation 256-gigabyte CMM-DDR5 sample based on CXL 3.2. The sample, which doubled the capacity of its first-generation component, ran inside a pooled-memory server supplied by AI infrastructure firm Liqid. SK hynix established no production timeline.
Samsung’s Production and Performance
Meanwhile, Samsung targeted year-end production for its next-generation CMM-D module. Reports in early July indicated the schedule could slip into 2027 due to delays in supporting server platforms from Intel and AMD. Addressing the timeline, the news report quoted Samsung stating that “despite some changes to parts of the plan,” it prepared to begin production on schedule. In performance tests on July 9, Samsung reported that a 1-terabyte CXL memory pool achieved roughly 92 per cent of DRAM-level inference performance across eight GPUs while storing larger caches.
CXL Complements, Not Replaces, HBM
Similarly, SK hynix researchers published work in June showing up to a 35.7 per cent throughput increase when using CXL as a shared terabyte-scale tier for inference. Industry experts noted that CXL complemented rather than replaced HBM, expanding overall capacity while reserving HBM for speed-intensive calculations. However, because CXL operated slower than local DRAM, overall performance depended on controller software and memory-management tools.
Market Outlook and Future Adoption
Evaluating the market outlook, Eugene Investment & Securities analyst Yim So-jung stated, “As AI expands, so will the market’s appetite for CXL, and that really takes off from 2026.” “By 2028, CXL-capable server platforms should be the mainstream,” the report quoted Yim.
(Except for the headline, this story has not been edited by Asianet Newsable English staff and is published from a syndicated feed.)